Model { Name "lab1inc" Version 6.1 MdlSubVersion 0 GraphicalInterface { NumRootInports 0 NumRootOutports 0 ParameterArgumentNames "" ComputedModelVersion "1.199" NumModelReferences 0 NumTestPointedSignals 0 } SavedCharacterEncoding "ibm-5348_P100-1997" SaveDefaultBlockParams on SampleTimeColors off LibraryLinkDisplay "none" WideLines off ShowLineDimensions off ShowPortDataTypes off ShowLoopsOnError on IgnoreBidirectionalLines off ShowStorageClass off ShowTestPointIcons on ShowViewerIcons on SortedOrder off ExecutionContextIcon off ShowLinearizationAnnotations on RecordCoverage off CovPath "/" CovSaveName "covdata" CovMetricSettings "dw" CovNameIncrementing off CovHtmlReporting on covSaveCumulativeToWorkspaceVar on CovSaveSingleToWorkspaceVar on CovCumulativeVarName "covCumulativeData" CovCumulativeReport off CovReportOnPause on ScopeRefreshTime 0.035000 OverrideScopeRefreshTime on DisableAllScopes off DataTypeOverride "UseLocalSettings" MinMaxOverflowLogging "UseLocalSettings" MinMaxOverflowArchiveMode "Overwrite" BlockNameDataTip off BlockParametersDataTip off BlockDescriptionStringDataTip off ToolBar on StatusBar on BrowserShowLibraryLinks off BrowserLookUnderMasks off Created "Thu Aug 05 16:35:41 2004" UpdateHistory "UpdateHistoryNever" ModifiedByFormat "%" LastModifiedBy "umb" ModifiedDateFormat "%" LastModifiedDate "Wed Jan 18 19:05:48 2006" ModelVersionFormat "1.%" ConfigurationManager "None" LinearizationMsg "none" Profile off ParamWorkspaceSource "MATLABWorkspace" AccelSystemTargetFile "accel.tlc" AccelTemplateMakefile "accel_default_tmf" AccelMakeCommand "make_rtw" TryForcingSFcnDF off ExtModeBatchMode off ExtModeEnableFloating on ExtModeTrigType "manual" ExtModeTrigMode "normal" ExtModeTrigPort "1" ExtModeTrigElement "any" ExtModeTrigDuration 1000 ExtModeTrigDurationFloating "auto" ExtModeTrigHoldOff 0 ExtModeTrigDelay 0 ExtModeTrigDirection "rising" ExtModeTrigLevel 0 ExtModeArchiveMode "off" ExtModeAutoIncOneShot off ExtModeIncDirWhenArm off ExtModeAddSuffixToVar off ExtModeWriteAllDataToWs off ExtModeArmWhenConnect on ExtModeSkipDownloadWhenConnect off ExtModeLogAll on ExtModeAutoUpdateStatusClock on BufferReuse on StrictBusMsg "None" ProdHWDeviceType "32-bit Generic" ShowModelReferenceBlockVersion off ShowModelReferenceBlockIO off Array { Type "Handle" Dimension 1 Simulink.ConfigSet { $ObjectID 1 Version "1.0.4" Array { Type "Handle" Dimension 7 Simulink.SolverCC { $ObjectID 2 Version "1.0.4" StartTime "0.0" StopTime "5*10^3" AbsTol "auto" FixedStep "auto" InitialStep "auto" MaxNumMinSteps "-1" MaxOrder 5 ExtrapolationOrder 4 NumberNewtonIterations 1 MaxStep "auto" MinStep "auto" RelTol "1e-3" SolverMode "SingleTasking" Solver "FixedStepDiscrete" SolverName "FixedStepDiscrete" ZeroCrossControl "UseLocalSettings" PositivePriorityOrder off AutoInsertRateTranBlk off SampleTimeConstraint "Unconstrained" RateTranMode "Deterministic" } Simulink.DataIOCC { $ObjectID 3 Version "1.0.4" Decimation "1" ExternalInput "[t, u]" FinalStateName "xFinal" InitialState "xInitial" LimitDataPoints on MaxDataPoints "1000" LoadExternalInput off LoadInitialState off SaveFinalState off SaveFormat "Array" SaveOutput on SaveState off SignalLogging on SaveTime on StateSaveName "xout" TimeSaveName "tout" OutputSaveName "yout" SignalLoggingName "sigsOut" OutputOption "RefineOutputTimes" OutputTimes "[]" Refine "1" } Simulink.OptimizationCC { $ObjectID 4 Version "1.0.4" BlockReduction on BooleanDataType on ConditionallyExecuteInputs on ConditionalExecOptimization "on_for_testing" InlineParams off InlineInvariantSignals on OptimizeBlockIOStorage on BufferReuse on EnforceIntegerDowncast on ExpressionFolding on FoldNonRolledExpr on LocalBlockOutputs on ParameterPooling on RollThreshold 5 SystemCodeInlineAuto off StateBitsets off DataBitsets off UseTempVars off ZeroExternalMemoryAtStartup on ZeroInternalMemoryAtStartup on InitFltsAndDblsToZero on NoFixptDivByZeroProtection off OptimizeModelRefInitCode off LifeSpan "inf" } Simulink.DebuggingCC { $ObjectID 5 Version "1.0.4" RTPrefix "error" ConsistencyChecking "none" ArrayBoundsChecking "none" AlgebraicLoopMsg "warning" ArtificialAlgebraicLoopMsg "warning" CheckSSInitialOutputMsg on CheckExecutionContextPreStartOutputMsg off CheckExecutionContextRuntimeOutputMsg off SignalResolutionControl "TryResolveAllWithWarning" BlockPriorityViolationMsg "warning" MinStepSizeMsg "warning" SolverPrmCheckMsg "none" InheritedTsInSrcMsg "warning" DiscreteInheritContinuousMsg "warning" MultiTaskDSMMsg "warning" MultiTaskRateTransMsg "error" SingleTaskRateTransMsg "none" TasksWithSamePriorityMsg "warning" CheckMatrixSingularityMsg "none" IntegerOverflowMsg "warning" Int32ToFloatConvMsg "warning" ParameterDowncastMsg "error" ParameterOverflowMsg "error" ParameterPrecisionLossMsg "warning" UnderSpecifiedDataTypeMsg "none" UnnecessaryDatatypeConvMsg "none" VectorMatrixConversionMsg "none" InvalidFcnCallConnMsg "error" FcnCallInpInsideContextMsg "Use local settings" SignalLabelMismatchMsg "none" UnconnectedInputMsg "warning" UnconnectedOutputMsg "warning" UnconnectedLineMsg "warning" SFcnCompatibilityMsg "none" UniqueDataStoreMsg "none" RootOutportRequireBusObject "warning" AssertControl "UseLocalSettings" EnableOverflowDetection off ModelReferenceIOMsg "none" ModelReferenceVersionMismatchMessage "none" ModelReferenceIOMismatchMessage "none" ModelReferenceCSMismatchMessage "none" ModelReferenceSimTargetVerbose off UnknownTsInhSupMsg "warning" ModelReferenceDataLoggingMessage "warning" ModelReferenceSymbolNameMessage "warning" } Simulink.HardwareCC { $ObjectID 6 Version "1.0.4" ProdBitPerChar 8 ProdBitPerShort 16 ProdBitPerInt 32 ProdBitPerLong 32 ProdIntDivRoundTo "Undefined" ProdEndianess "Unspecified" ProdWordSize 32 ProdShiftRightIntArith on ProdHWDeviceType "32-bit Generic" TargetBitPerChar 8 TargetBitPerShort 16 TargetBitPerInt 32 TargetBitPerLong 32 TargetShiftRightIntArith on TargetIntDivRoundTo "Undefined" TargetEndianess "Unspecified" TargetWordSize 32 TargetTypeEmulationWarnSuppressLevel 0 TargetPreprocMaxBitsSint 32 TargetPreprocMaxBitsUint 32 TargetHWDeviceType "Specified" TargetUnknown on ProdEqTarget on } Simulink.ModelReferenceCC { $ObjectID 7 Version "1.0.4" UpdateModelReferenceTargets "IfOutOfDateOrStructuralChange" CheckModelReferenceTargetMessage "error" ModelReferenceNumInstancesAllowed "Multi" ModelReferencePassRootInputsByReference on ModelReferenceMinAlgLoopOccurrences off } Simulink.RTWCC { $BackupClass "Simulink.RTWCC" $ObjectID 8 Version "1.0.4" SystemTargetFile "grt.tlc" GenCodeOnly off MakeCommand "make_rtw" TemplateMakefile "grt_default_tmf" GenerateReport off SaveLog off RTWVerbose on RetainRTWFile off ProfileTLC off TLCDebug off TLCCoverage off TLCAssert off ProcessScriptMode "Default" ConfigurationMode "Optimized" ConfigAtBuild off IncludeHyperlinkInReport off LaunchReport off Array { Type "Handle" Dimension 2 Simulink.CodeAppCC { $ObjectID 9 Version "1.0.4" ForceParamTrailComments off GenerateComments on IgnoreCustomStorageClasses on IncHierarchyInIds off MaxIdLength 31 PreserveName off PreserveNameWithParent off ShowEliminatedStatement off IncAutoGenComments off SimulinkDataObjDesc off SFDataObjDesc off IncDataTypeInIds off PrefixModelToSubsysFcnNames on CustomSymbolStr "$R$N$M" MangleLength 1 DefineNamingRule "None" ParamNamingRule "None" SignalNamingRule "None" InsertBlockDesc off SimulinkBlockComments on EnableCustomComments off InlinedPrmAccess "Literals" ReqsInCode off } Simulink.GRTTargetCC { $BackupClass "Simulink.TargetCC" $ObjectID 10 Version "1.0.4" TargetFcnLib "ansi_tfl_tmw.mat" GenFloatMathFcnCalls "ANSI_C" UtilityFuncGeneration "Auto" GenerateFullHeader on GenerateSampleERTMain off IsPILTarget off ModelReferenceCompliant off IncludeMdlTerminateFcn on CombineOutputUpdateFcns off SuppressErrorStatus off IncludeFileDelimiter "Auto" ERTCustomFileBanners off SupportAbsoluteTime on LogVarNameModifier "rt_" MatFileLogging off MultiInstanceERTCode off SupportNonFinite on SupportComplex on PurelyIntegerCode off SupportContinuousTime on SupportNonInlinedSFcns on ExtMode off ExtModeStaticAlloc off ExtModeTesting off ExtModeStaticAllocSize 1000000 ExtModeTransport 0 ExtModeMexFile "ext_comm" RTWCAPISignals off RTWCAPIParams off RTWCAPIStates off GenerateASAP2 off } PropName "Components" } } PropName "Components" } Name "Configuration" SimulationMode "normal" CurrentDlgPage "Solver" } PropName "ConfigurationSets" } Simulink.ConfigSet { $PropName "ActiveConfigurationSet" $ObjectID 1 } BlockDefaults { Orientation "right" ForegroundColor "black" BackgroundColor "white" DropShadow off NamePlacement "normal" FontName "Helvetica" FontSize 10 FontWeight "normal" FontAngle "normal" ShowName on } BlockParameterDefaults { Block { BlockType "S-Function" FunctionName "system" SFunctionModules "''" PortCounts "[]" } } AnnotationDefaults { HorizontalAlignment "center" VerticalAlignment "middle" ForegroundColor "black" BackgroundColor "white" DropShadow off FontName "Helvetica" FontSize 10 FontWeight "normal" FontAngle "normal" } LineDefaults { FontName "Helvetica" FontSize 9 FontWeight "normal" FontAngle "normal" } System { Name "lab1inc" Location [25, 99, 1015, 630] Open on ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" ZoomFactor "104" ReportName "simulink-default.rpt" Block { BlockType Reference Name "2-to-1 Multiplexer" Ports [3, 1] Position [780, 235, 825, 295] ForegroundColor "blue" SourceBlock "gate_alteradspbuilder/n-to-1 Multiplexer" SourceType "MultipleBusMuxAlteraBlockSet" Inputs "2" pipeline "0" BusType off clken off bwaddr "1" } Block { BlockType Reference Name "Binary To \nSeven Segments" Ports [1, 1] Position [580, 390, 645, 410] ForegroundColor "blue" SourceBlock "gate_alteradspbuilder/Binary To \nSeven Segment" "s" SourceType "HDLEntity AlteraBlockSet" HDLInputPortsMappingAltera "d.4.0.u" HDLOutputPortsMappingAltera "r.7.0.u" HDLImplicitPortsMappingAltera "NOIMPLICITINPUT" HDLParameterMappingAltera "NOHDLPARAMETER" HDLLibraryInformationAltera "library dspbuilder;use dspbuilder.dspbuilde" "rblock.all;" HDLComponentNameAltera "sBin2BcdAltr" } Block { BlockType Reference Name "BusConversion" Ports [1, 1] Position [465, 391, 540, 409] ForegroundColor "blue" SourceBlock "bus_alteradspbuilder/BusConversion" SourceType "SubBus Altera BlockSet" Inputs "Unsigned Integer" bwl "29" bwr "0" Outputs "Unsigned Integer" obwl "4" obwr "0" msb "28" lsb "25" rnd off sat off } Block { BlockType Reference Name "BusConversion1" Ports [1, 1] Position [460, 171, 535, 189] ForegroundColor "blue" SourceBlock "bus_alteradspbuilder/BusConversion" SourceType "SubBus Altera BlockSet" Inputs "Unsigned Integer" bwl "29" bwr "0" Outputs "Unsigned Integer" obwl "7" obwr "0" msb "16" lsb "10" rnd off sat off Port { PortNumber 1 Name "triangle MSBs" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" ShowSigGenPortName on } } Block { BlockType Reference Name "BusConversion2" Ports [1, 1] Position [470, 281, 545, 299] ForegroundColor "blue" SourceBlock "bus_alteradspbuilder/BusConversion" SourceType "SubBus Altera BlockSet" Inputs "Unsigned Integer" bwl "29" bwr "0" Outputs "Unsigned Integer" obwl "14" obwr "0" msb "16" lsb "3" rnd off sat off } Block { BlockType Reference Name "D2A_1\n14 Bit Unsigned" Description "Sign Binary Fractionnal" Ports [1, 1] Position [865, 245, 910, 285] ForegroundColor "blue" SourceBlock "dspboard2C35_alteradspbuilder/D2A_1\n14 Bit Uns" "igned" SourceType "AltBus AlteraBlockSet" sgn "Unsigned Integer" nodetype "Output Port" bwl "14" bwr "0" sat off rnd off cst "0" DspBoard "dspboard2C35" LocPin "Pin_P6, Pin_R5, Pin_U7, Pin_P3, Pin_V6, Pin_V5," " Pin_AA5, Pin_Y4, Pin_T2, Pin_U3, Pin_AD3, Pin_AE3, Pin_AA1, Pin_AB1," componentid "D2A_0" modulename "D2A_114BitUnsigned" nSgCpl "0" } Block { BlockType Reference Name "Delay6" Ports [1, 1] Position [705, 311, 725, 349] ForegroundColor "blue" ShowName off SourceBlock "store_alteradspbuilder/Delay" SourceType "Delay AlteraBlockSet" depth "1" clken off MaskValue "1" } Block { BlockType Reference Name "Delay7" Ports [1, 1] Position [570, 272, 590, 308] ForegroundColor "blue" ShowName off SourceBlock "store_alteradspbuilder/Delay" SourceType "Delay AlteraBlockSet" depth "1" clken off MaskValue "1" } Block { BlockType Reference Name "Delay8" Ports [1, 1] Position [680, 381, 695, 419] ForegroundColor "blue" ShowName off SourceBlock "store_alteradspbuilder/Delay" SourceType "Delay AlteraBlockSet" depth "1" clken off MaskValue "1" } Block { BlockType Reference Name "LED0" Description "Sign Binary Fractionnal" Ports [1, 1] Position [780, 169, 825, 181] ForegroundColor "blue" SourceBlock "dspboard2C35_alteradspbuilder/LED0" SourceType "AltBus AlteraBlockSet" sgn "Single Bit" nodetype "Output Port" bwl "1" bwr "0" sat off rnd off cst "0" DspBoard "dspboard2C35" LocPin "Pin_E5" componentid "LED0" modulename "LED0" nSgCpl "0" } Block { BlockType Reference Name "LSBs" Description "Sign Binary Fractionnal" Ports [0, 1] Position [40, 161, 90, 179] ForegroundColor "blue" SourceBlock "bus_alteradspbuilder/Constant" SourceType "AltBus AlteraBlockSet" sgn "Unsigned Integer" nodetype "Constant" bwl "16" bwr "0" sat off rnd off bp off mask_cst "32" ncstsamp "1" cst "32" modulename "Constant" nSgCpl "0" } Block { BlockType Reference Name "LUT" Ports [1, 1] Position [585, 158, 670, 202] ForegroundColor "blue" SourceBlock "gate_alteradspbuilder/LUT" SourceType "LUT AlteraBlockSet" BusType "Unsigned Integer" bwl "14" bwr "0" bwaddr "7" MatlabArray "8191*sin( [0:2*pi/(2^7):2*pi] )+8192" LocPin "lab1incLUT" lpm on modulename "C:\\Documents and Settings\\umb\\Uwe\\tex\\PRO" "\\CCLI\\LabIntroDOC\\bb\\DSPBuilder_lab1inc\\lab1incLUT.lut" pipeline on IslibDir "0" clken off Port { PortNumber 1 Name "sine unsigned" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" ShowSigGenPortName on } } Block { BlockType Reference Name "MSBs" Description "Sign Binary Fractionnal" Ports [0, 1] Position [40, 116, 90, 134] ForegroundColor "blue" SourceBlock "bus_alteradspbuilder/Constant" SourceType "AltBus AlteraBlockSet" sgn "Unsigned Integer" nodetype "Constant" bwl "13" bwr "0" sat off rnd off bp off mask_cst "0" ncstsamp "1" cst "0" modulename "Constant" nSgCpl "0" } Block { BlockType Reference Name "Parallel \nAdder Subtractor" Ports [2, 1] Position [305, 141, 375, 234] ForegroundColor "blue" SourceBlock "arithm_alteradspbuilder/Parallel \nAdder Subtra" "ctor" SourceType "Sum AlteraBlockSet" Inputs "2" direction "+" pipeline on clken off MaskValue "1" Port { PortNumber 1 Name "triangle 29 bits" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" ShowSigGenPortName on } } Block { BlockType Reference Name "SW2" Description "Sign Binary Fractionnal" Ports [1, 1] Position [635, 217, 675, 263] ForegroundColor "blue" SourceBlock "dspboard2C35_alteradspbuilder/SW2" SourceType "AltBus AlteraBlockSet" sgn "Single Bit" nodetype "Input Port" bwl "1" bwr "0" sat off rnd off cst "0" DspBoard "dspboard2C35" LocPin "Pin_AE14" componentid "SWITCH4" modulename "SW2" nSgCpl "0" } Block { BlockType Reference Name "Seven Segment \nDisplay 0" Description "Sign Binary Fractionnal" Ports [1, 1] Position [735, 374, 775, 426] ForegroundColor "blue" SourceBlock "dspboard2C35_alteradspbuilder/Seven Segment \nD" "isplay 0" SourceType "AltBus AlteraBlockSet" sgn "Unsigned Integer" nodetype "Output Port" bwl "8" bwr "0" sat off rnd off cst "0" DspBoard "dspboard2C35" LocPin "Pin_V3, Pin_W21, Pin_U1, Pin_E1, Pin_Y5, Pin_AB" "23, Pin_T7, Pin_Y21," componentid "7SegmentDisplay0" modulename "SevenSegmentDisplay0" nSgCpl "0" } Annotation { Name "Design name: Lab1\nDesigner: YourName\nDate:\nV" "ersion:" Position [80, 400] HorizontalAlignment "left" DropShadow on TeXMode "on" FontName "Arial" FontWeight "bold" } } }